12-Bit, 60Msps, 3.3V, Low-Power ADC Evaluation Kit
Created: Jan 25, 2017
No description available.
An analog-to-digital converter (ADC) device plays an important role in parallel with FPGA. Aside of converting signal, it also secures data from noise and possible data errors. The MAX1420 12-bit ADC with internal reference features a fully differential input, pipelined, 12-stage ADC architecture with wideband track-and-hold (T/H) and digital error correction, and power-down modes. Provided that this ADC is capable of 12-bit resolution, stores 4096 different values from an analog voltage or analog input. Since FPGA and other digital machine are running in ones and zeroes, this ADC gives the signal in digital with 4096 different values or combination using ones and zeroes. It has internal 2.048V precision bandgap reference that increases accuracy.
For this evaluation kit of MAX1420, the circuit is designed to optimize the performance of ADC that this requires separate analog and digital power supplies for best performance. The power supply has +3.3V that is supplied to the analog portion or AVDD while the digital portion or DVDD1 has also +3.3V separate supply but it can operate down to +2.7V without compromising the board’s performance and it can accept voltage as high as +3.6V. The input signal should be single-ended analog and converted by a transformer to a differential signal and this signal will be the input for the INP and INN pins. The clock input signal should also be single-ended sinusoidal in which this clock determines the sampling rate of ADCs. The CLK and /CLK pins will also receive a differential signal converted by a transformer from sinusoidal clock input signal. To set the full-scale analog input range, MAX1420 will require a voltage reference. This reference voltage can set through internal reference mode, buffered external reference mode, or unbuffered external reference mode. Any of these three modes of operation will set the reference voltage and these modes will make use of CMLT, REFNT, REFPT, and REFIN pins. The digital output of MAX1420 ADC is fed to a buffer/line driver that will be able to drive a capacitive load without compromising the ADC’s dynamic performance while its output is connected to a 26-pin header where the user can connect a logic analyzer or data-acquisition system. It has also features that enable and power-down the MAX1420 through JU1 jumper or enable/disable the digital outputs through JU2 jumper.
This 12-bit ADC is enough to handle imaging and digital communications with respect to its resolution capability. This evaluation kit can be used in the development of radar, IR focal plane arrays, medical ultrasound imaging, and IF and baseband digitization. Aside of its resolution capability, MAX1420 is also applicable to CCD Pixel Processing that is related to astronomical analytical instrumentation.