Backplane Data and Clock Buses Protection
Created: Aug 28, 2014
No description available.
This simple circuit is part of a common I/O cards that can be found in computer board. It features SDA and SCL corruption protection during live board insertion and removal from multipoint backplane systems. It prevents the backplane from being connected to the card until a stop command occurs on the backplane without bus contention on the card. It also features no rise time accelerator circuitry to prevent interference when there are multiple devices in the same system. It is compatible with Standard-mode I2C-bus, Fast-mode I2C-bus, and SMBus standards.
The PCA9510AD device is a hot swappable I2C-bus and SMBus buffer which is the heart of this circuit. The data lines are provided with pull-up resistors that insure transmission during the operation. The capacitors stabilize the supplies of both ENABLE and VCC pin.
This circuit is suitable to electronic devices that uses I2C-bus standard. It is an excellent innovation, which improves the durabil