Dual Bidirectional I2C Level Translator
Created: Feb 21, 2014
No description available.
From its early days, the semiconductor industry's mantra has been smaller, better, faster, and cheaper. Today's handheld computing devices are more powerful than the first computers, which required separate buildings. Manufacturers have so far achieved the simultaneous dramatic improvements in cost, performance, and speed by reducing the size of the individual transistors that make up semiconductor devices. This size reduction has had an interesting consequence. As transistors shrink, their operating voltage also shrinks. The most popular power-supply voltage in embedded systems used to be 5V. Now, though, most components in typical embedded systems are moving toward lower supply voltages to take advantage of the industry's newest trends. On the other hand, some system components take longer than others to evolve. Therefore, during the transition to lower voltage, components of a system often require different supply voltages. This situation creates challenges for embedded-system designers. One approach is to use level translators, although they can be costly.
The PCA9306 allows bidirectional voltage translations between 1.2 V and 5V, without the use of a direction pin. The low ON-state resistance (ron) of the switch allows connections to be made with minimal propagation delay. When EN is high, the translator switch is ON, and the SCL1 and SDA1 I/O are connected to the SCL2 and SDA2 I/O, respectively, allowing bidirectional data flow between ports. When EN is low, the translator switch is off, and a high-impedance state exists between ports. In I2C applications, the bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9306 enables the system designer to isolate two halves of a bus; thus, more I2C devices or longer trace length can be accommodated.
The PCA9306 also can be used to run two buses, one at 400-kHz operating frequency and the other at 100-kHz operating frequency. If the two buses are operating at different frequencies, the 100-kHz bus must be isolated when the 400-kHz operation of the other bus is required. If the master is running at 400 kHz, the maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater.
As with the standard I2C system, pull-up resistors are required to provide the logic high levels on the translator’s bus. The PCA9306 has a standard open-collector configuration of the I2C bus. The size of these pull-up resistors depends on the system, but each side of the repeater must have a pull-up resistor. The device is designed to work with standard-mode and fast-mode I2C devices, in addition to SMBus devices. Standard-mode I2C devices only specify 3 mA in a generic I2C system where standard-mode devices and multiple masters are possible. Under certain conditions, high termination currents can be used.